As CPU core counts continue to increase, bandwidth per core cannot continue to scale with DDR4. The memory architectures are required to meet next-generation bandwidth per core requirements in x86 CPUs. With the changing landscape of ever-increasing CPU core counts, DDR5 was designed to increase bandwidth delivered to systems.
DDR5 is the latest evolution in DRAM, delivering a long list of the features designed to increase reliability, availability, and serviceability (RAS); reduce power; and dramatically improve performance - all features that modern data centers require.
Advanced workloads resulting from rapidly expanding datasets and compute-intensive applications have fueled processor core count growth which will be bandwidth-starved by current DDR4 DRAM technology over time. DDR5, a technologically DRAM to date, will enable the next generation of server workloads by delivering as much as an 85% increase in memory performance. DDR5 doubles memory density while improving reliability at a time when data center system architects seek to supply rapidly growing processor core counts with increased memory bandwidth and capacity.